1. Field of the Invention
The present invention relates to a semiconductor device having a stacked via, and more particularly to a semiconductor device including wires provided among a plurality of contacts constituting the stacked via, or a semiconductor device including wires placed near connections of a plurality of contacts.
2. Description of the Background Art
FIG. 12 is a cross section of a semiconductor device with stacked-via structure in the background art.
The semiconductor device of FIG. 12 has a semiconductor substrate 101, the first insulating film 102 layered on the semiconductor substrate 101, a barrier metal 103 layered on a surface of a contact hole provided in the first insulating film 102 and tungsten 104 filling the contact hole, and the barrier metal 103 and the tungsten 104 constitute the first contact 105.
On the first contact 105 provided is the first wire 109 by patterning, which consists of an AlCu film 107 and barrier metals 106 and 108 formed on bottom and upper surfaces of the AlCu film 107. On a surface of the first wire 109 and a surface of the insulating film 102 layered are an insulating film 110a having a uniform thickness and insulating films 110b and 110c both having evened surfaces, which constitute the second insulating film 110. The insulating films 110a and 110c are made of (.delta.-TEOS (.delta.-tetraethil orthosilicate) and the insulating film 110b is made of SOG (spin on grass).
A barrier metal 111 is formed in a portion which corresponds at least to a surface of a via hole provided in the second insulating film 110 on the surface of the first wire 109, and the via hole is filled with, for example, tungsten 112. The barrier metal 111 and the tungsten 112 constitute a contact 113.
Further, the second wire 117 consisting of an AlCu film 115 and barrier metal layers 114 and 116 formed on bottom and upper surfaces of the AlCu film 115 is so formed on a surface of the second insulating film 110 as to come into contact with the contact 113.
As shown in FIG. 12, when the first contact 105, the first wire 109, the second contact 113 and the second wire 117 are in good alignment, good mutual connection is obtained and good gap-filling characteristics of contact is also obtained.
In a case of FIG. 13, however, where a via hole 118 used for embedding the second contact 113 merely overlaps the first wire 109 and part of the via hole 118 is formed out of the surface of the first wire 109, the insulating film 110b made of the SOG of an internal wall of the via hole 118 has a wider exposed area. Therefore, when a film of conductive substance 112a is formed at high temperature by CVD (chemical vapor deposition) to fill the inside of the via hole 118, there is degas 119 from the SOG of the insulating film 110b and the degas 119 is discharged out through the via hole 118. For this reason, the via hole 118 is not completely filled with the conductive substance 112a, creating a void 118a.
When the void 118a is created inside the second contact 113a in the via hole 118 as shown in FIG. 14, a contact resistance substantially increases and it is thereby impossible to obtain a good electrical connection even if the second wire 117 is formed on the second contact 113a.
FIG. 15 is a cross section of a prior-art semiconductor device shown in Japanese Patent Application Laid Open Gazette 8-250589.
The semiconductor device of FIG. 15 has conductive films 120, 121, 122 and 123 constituting a wire 124 and conductive films 125 and 126 constituting a side wall 127, specifically, a Ti film 120, a TiN film 121, an Al--Si film 122, a TiN film 123, a TiN film 125 and a W film 126.
An interlayer insulating film 128 is layered on the wire 124 and a contact 131 is embedded in the interlayer insulating film 128, being in contact with the wire 124. The contact 131 consists of a TiN film 129 formed on an internal wall of the contact hole and a W film 130 filling an opening. A wire 135 is formed over an upper surface of the interlayer insulating film 128, being electrically connected to the contact 131. The wire 135 is constituted of a Ti film 132, an Al--Si film 133 and a TiN film 134 which are layered in this order
The semiconductor device of FIG. 15 allows a good electrical connection, even if there is a deviation of alignment between the lower-layer wire 124 and the contact 131 formed thereon, because of a wider margin of alignment obtained by providing the side walls 127 made of a conductive substance attached on side surfaces of the wire 124.
In order to make the side wall 127 of a conductive substance, however, the conductive substance is layered on surfaces which correspond to a surface of the wire 124 and a bottom surface of the interlayer insulating film 128 (on which the wire 124 is provided by patterning), and an overetching for partially removing the conductive substance is needed to leave the side wall 127 in a manufacturing process, so that a short-circuit between the wire 124 and other wires is avoided, necessarily causing a damage on the upper surface of the wire 124 due to etching.
The damage to the TiN film 123 in a surface layer of the wire 124 deteriorates film quality as an antireflection film in patterning of the wire 124, and that causes a problem of hindering formation of a good etching mask.
Further, when the conductive substance of the side wall 127 on the interlayer insulating film 128 can not completely removed by etching, there arises another problem of causing a short-circuit between the stacked via and other conductive films.
Furthermore, as for a stacked-via structure, according to a background art of FIG. 16, when the stacked via is made by overlapping the first and second contacts 105 and 113, and a wire 136 which should be electrically insulated therefrom is formed near the stacked via, if there is only a small margin of alignment of the wire 136 and the first and second contacts 105 and 113, there arises still another problem of causing a short-circuit if a deviation of alignment exists.